Renesas RL78/G13 User Manual

RL78/G13 CHAPTER 3 CPU ARCHITECTURE
R01UH0146EJ0100 Rev.1.00 140
Sep 22, 2011
Table 3-5. SFR List (4/5)
Manipulable Bit Range Address Special Function Register (SFR) Name Symbol R/W
1-bit 8-bit 16-bit
After Reset
FFFA0H Clock operation mode control
register
CMC R/W
− √ −
00H
FFFA1H Clock operation status control
register
CSC R/W
√ √ −
C0H
FFFA2H Oscillation stabilization time
counter status register
OSTC R
√ √ −
00H
FFFA3H Oscillation stabilization time
select register
OSTS R/W
− √ −
07H
FFFA4H System clock control register CKC R/W
√ √ −
00H
FFFA5H Clock output select register 0 CKS0 R/W
√ √ −
00H
FFFA6H Clock output select register 1 CKS1 R/W
√ √ −
00H
FFFA8H Reset control flag register RESF R
− √ −
Undefined
Note 1
FFFA9H Voltage detection register LVIM R/W
√ √ −
00H
Note 2
FFFAAH Voltage detection level register LVIS R/W
√ √ −
00H/01H/81H
Note 3
FFFABH Watchdog timer enable register WDTE R/W
− √ −
1AH/9AH
Note 4
FFFACH CRC input register CRCIN R/W
− √ −
00H
FFFB0H DMA SFR address register 0 DSA0 R/W
− √ −
00H
FFFB1H DMA SFR address register 1 DSA1 R/W
− √ −
00H
FFFB2H DMA RAM address register 0L DRA0L R/W
− √
00H
FFFB3H DMA RAM address register 0H DRA0H
DRA0
R/W
− √
√
00H
FFFB4H DMA RAM address register 1L DRA1L R/W
− √
00H
FFFB5H DMA RAM address register 1H DRA1H
DRA1
R/W
− √
√
00H
FFFB6H DMA byte count register 0L DBC0L R/W
− √
00H
FFFB7H DMA byte count register 0H DBC0H
DBC0
R/W
− √
√
00H
FFFB8H DMA byte count register 1L DBC1L R/W
− √
00H
FFFB9H DMA byte count register 1H DBC1H
DBC1
R/W
− √
√
00H
FFFBAH DMA mode control register 0 DMC0 R/W
√ √ −
00H
FFFBBH DMA mode control register 1 DMC1 R/W
√ √ −
00H
FFFBCH DMA operation control register 0 DRC0 R/W
√ √ −
00H
FFFBDH DMA operation control register 1 DRC1 R/W
√ √ −
00H
FFFD0H Interrupt request flag register 2L IF2L R/W
√ √
00H
FFFD1H Interrupt request flag register 2H IF2H
IF2
R/W
√ √
√
00H
FFFD2H Interrupt request flag register 3L IF3L IF3 R/W
√ √ √
00H
FFFD4H Interrupt mask flag register 2L MK2L R/W
√ √
FFH
FFFD5H Interrupt mask flag register 2H MK2H
MK2
R/W
√ √
√
FFH
FFFD6H Interrupt mask flag register 3L MK3L MK3 R/W
√ √ √
FFH
Notes 1. The reset value of the RESF register varies depending on the reset source.
2. The reset value of the LVIM register varies depending on the reset source.
3. The reset value of the LVIS register varies depending on the reset source and the setting of the option byte.
4. The reset value of the WDTE register is determined by the setting of the option byte.

Renesas RL78/G13 Specifications

General

Brand	Renesas
Model	RL78/G13
Category	Computer Hardware
Language	English