Chapter 7 Deployment of the CPU 21xDP Manual VIPA CPU 21x
7-32 HB103E - Rev. 05/45
As shown above, the application program in the CPU has two tasks that
are handled by two OBs:
• Load the input byte from the Profibus slave and transfer the value to the
output module.
OB 1 (cyclic call)
L PEW 100 Load status data and save in
T MW 100 flag word
UN M 100.5 Commissioning by the DP master
BEB occurred? No -> End
U M 101.4 Valid receive data?
BEB No -> End
L B#16#FF Load control value and compare
L PEB 30 to control byte
<>I (1st input byte)
BEB Received data does not contain
valid values
L B#16#FE Control byte for master-CPU
T PAB 40
-------------------------------
Data exchange via Profibus
L PEB 31 Load peripheral byte 31 (input
data from Profibus slave) and
T AB 0 transfer into output byte 0
BE
• Read counter value from MB 0, increment, save into MB0 and put it out
to CPU 21x via Profibus.
OB 35 (timer-OB)
L MB 0 Counter from 0x00 to 0xFF
L 1
+I
T MB 0
T PAB 41 Transfer counter value into
peripheral byte 41 (output data
of the Profibus slave)
BE
Application
program in the
CPU 214DP
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