Chapter 12 Instruction list Manual VIPA CPU 21x
12-8 HB103E - Rev. 05/45
The values are analyzed or set by the instructions.
The status word is 16Bit wide.
Bit Assignment Description
0 /FC First check bit*
1 RLO Result of (previous) logic instruction
2 STA Status*
3 OR Or*
4 OS Stored overflow
5 OV Overflow
6 CC0 Condition code
7 CC1 Condition code
8 BR Binary result
9 to 15 not used -
* Bit may not be analyzed with the instruction L STW in the user application, for the Bit isn't updated
during application run-time.
Addressing examples
Addressing example Description
Immediate addressing
L +27 Load 16Bit integer constant "27" in ACCU1.
L L#-1
Load 32Bit integer constant "-1" in ACCU1.
L 2#1010101010101010
Load binary constant in ACCU1.
L DW#16#A0F0_BCFD
Load hexadecimal constant in ACCU1.
L 'End' Load ASCII code in ACCU1.
L T#500ms
Load time value in ACCU1.
L C#100
Load counter value in ACCU1.
L B#(100,12)
Load constant as 2Byte.
L B#(100,12,50,8)
Load constant as 4Byte.
L P#10.0
Load area-internal pointer in ACCU1.
L P#E20.6
Load area-crossing pointer in ACCU1.
L -2.5 Load real number in ACCU1.
L D#1995-01-20
Load date.
L TOD#13:20:33.125
Load time-of-day.
Direct addressing
A I 0.0 AND operation of input bit 0.0
L IB 1 Load input byte 1 in ACCU1.
L IW 0 Load input word 0 in ACCU1.
L ID 0 Load input double word 0 in ACCU1.
Status word
(16Bit)
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