VIPA CPU 21 Series User Manual

Chapter 12 Instruction list Manual VIPA CPU 21x
12-6 HB103E - Rev. 05/45
Abbreviation Description
L Local data
L#
Integer constant (32Bit)
LABEL Symbolic jump address (max. 4 characters)
LB Local data byte
LD Local data double word
LW Local data word
m Pointer constant P#x.y (pointer)
M Bit memory bit
MB Bit memory byte
MD Bit memory double word
MW Bit memory word
n Binary constant
OB Organization block
OR Or
OS Stored overflow
OV Overflow
p Hexadecimal constant
P#
Pointer constant
PIQ Process image of the outputs
PII Process image of the inputs
PIB Periphery input byte (direct periphery access)
PID Periphery input double word (direct periphery access)
PIW Periphery input word (direct periphery access)
PQB Periphery output byte (direct periphery access)
PQD Periphery output double word (direct periphery access)
PQW Periphery output word (direct periphery access)
Q Output (in the PIQ)
q Real number (32bit floating-point number)
QB Output byte (in the PIQ)
QD Output double word (in the PIQ)
QW Output word (in the PIQ)
r Block no.
RLO Result of (previous) logic instruction
S5T#
S5 time constant (16Bit), loads the S5-Timer
SFB System function block
SFC System function
STA Status
T Timer (times)
T#
Time constant (16/32Bit)
TOD#
IEC time constant
W area-crossing, register-indirect addressed word
W#16#
Word hexadecimal

VIPA CPU 21 Series Specifications

General

Brand	VIPA
Model	CPU 21 Series
Category	Control Unit
Language	English