Xilinx ZCU106 User Manual

ZCU106 Board User Guide 125
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
The FMC HPC0 (J5) and FMC HPC1 (J4) VADJ pins are wired to the programmable rail
VADJ_FMC_BUS. The VADJ_FMC_BUS rail is programmed to 1.80V by default. The valid
values of the VADJ_FMC rail are 1.2V, 1.5V, and 1.8V. The VADJ_FMC derivative rail powers
the XCZU7EV HP banks 28, 67, and 68 (see Table 3-2, page 28). Documentation describing
PMBus programming for the Maxim InTune power controllers is available at the Maxim
website [Ref 22]. The PCB layout and power system design meets the recommended criteria
described in the UltraScale Architecture PCB Design User Guide (UG583) [Ref 3].
MAX15027 U39 NA
Maxim LDO
regulator 1A
PS_DDR4_VPP_2V5 2.50V NA 85
MAX15303 U13 0x10
Maxim InTune digital
POL controller 4A
VCCOPS 1.80V PS:0x47 86
MAX8869E U31 NA
Maxim LDO
regulator 300MA
VCCOPS3 1.81V PS:0x4A 87
MAX8869E U30 NA
Maxim LDO
regulator 100MA
VCCPSDDRPLL 1.81V PS:0x4B 88
MAX8869E U143 NA
Maxim LDO
regulator 1A
UTIL_1V13 1.13V NA 89
MAX8869E U37 NA
Maxim LDO
regulator 1A
UTIL_1V8 1.80V NA 90
MAX15301
U49 0x1A
Maxim InTune digital
POL controller 20A
UTIL_3V3 3.30V NA 91
MAX15303
U8 0x1B
Maxim InTune digital
POL controller 6A
UTIL_5V0 5.00V NA 92
TPS15200 U36 NA
Memory Vtt
sink-source
regulator 3A
PS_DDR4_VTT 0.6V NA 93
TPS15200 U35 NA
Memory Vtt
sink-source
regulator 3A
PL_DDR4_VTT 0.6V NA 93
Table 3-54: Power System Devices (Cont’d)
Device
Type
Ref.
Des.
PMBus
Addr.
Description
Power Rail Net
Name
Power Rail
Voltage
INA226
Address
Schem.
Page
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Xilinx ZCU106 Specifications

General

Brand	Xilinx
Model	ZCU106
Category	Motherboard
Language	English