Xilinx ZCU106 User Manual

ZCU106 Board User Guide 80
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
SFP/SFP+ Connectors
[Figure 2-1, callout 18]
The ZCU106 board contains a small form-factor pluggable (SFP+) 1x2 dual-connector
(P1, P2) and cage assembly that accepts SFP or SFP+ modules. Figure 3-29 shows a typical
SFP+ module connector circuitry implementation. Table 3-32 lists the connections between
the dual connectors and the XCZU7EV MPSoC.
Note:
The SFPx_TX_DISABLE_TRANS default 2-pin jumper is On, which means the
SFPx_TX_DISABLE_TRANS net is pulled Low, enabling the TX output of the SFP module.
Table 3-31: AES3 Audio Connections to MPSoC U1
XCZU7EV
(U1) Pin
Schematic Net
Name
I/O Standard
Connected Component
Pin Name Device
G7 AES_IN LVCMOS33 1 R
U149
SN65HVD11DR
AE13 AES_OUT_P
(1) (3)
8 T1 SC937-02LF
AF13 AES_OUT_N
(2) (3)
5
Notes:
1. Series resistor, inductor, and capacitor coupled.
2. Series resistor and inductor coupled.
3. Transformer coupled by T1 SC937-02LF.
X-Ref Target - Figure 3-29
Figure 3-29: Typical SFP Interface
X19193-050117
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Xilinx ZCU106 Specifications

General

Brand	Xilinx
Model	ZCU106
Category	Motherboard
Language	English