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Xilinx ZCU106 User Manual

Xilinx ZCU106
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ZCU106 Board User Guide 38
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
Quad SPI Flash Memory (MIO 0–12)
[Figure 2-1, callout 3]
The Micron dual MT25QU512ABB8ESF serial NOR flash Quad SPI flash memories can hold
the boot image for the MPSoC system. To achieve higher performance, two Quad SPI flash
memory devices are connected in parallel and provide an 8-bit data bus for boot and
configuration. This interface is used to support QSPI32 boot mode as defined in the Zynq
UltraScale+ MPSoC Technical Reference Manual (UG1085) [Ref 2].
The dual Quad SPI flash memory located at U119/U120 provides 1 Gb of non-volatile
storage that can be used for configuration and data storage.
Part number: MT25QU512ABB8ESF-0SIT (Micron)
Supply voltage: 1.8V
Datapath width: 8 bits
Data rate: various depending on single, dual, or quad mode
18 UART0 44 SD1 70 GEM3
19 UART0 45 SD1 71 GEM3
20 UART1 46 SD1 72 GEM3
21 UART1 47 SD1 73 GEM3
22 GPIO 48 SD1 74 GEM3
23 GPIO 49 SD1 75 GEM3
24 CAN1 50 SD1 76 GEM3
25 CAN1 51 SD1 77 GEM3
Table 3-5: MIO Peripheral Mapping (Contd)
MIO[0:25] Bank 500 MIO[26:51] Bank 501 MIO[52:77] Bank 502
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Xilinx ZCU106 Specifications

General IconGeneral
BrandXilinx
ModelZCU106
CategoryMotherboard
LanguageEnglish

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