Xilinx ZCU106 User Manual

ZCU106 Board User Guide 83
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
User PMOD GPIO Headers
[Figure 2-1, callout 20, 21]
The ZCU106 evaluation board supports two PMOD GPIO headers J55 (right-angle female)
and J87 (vertical male). The 3.3V PMOD nets are level-shifted and wired to the XCZU7EV
device U1 banks 28, 66, and 68. Figure 3-31 shows the GPIO PMOD headers J55 and J87.
Table 3-33 lists the connections between the XCZU7EV MPSoC and the PMOD connectors.
Maximum PMOD interface speed is 110 Mb/s.
X-Ref Target - Figure 3-31
Figure 3-31: PMOD Connectors
X19195-050117
Table 3-33: XCZU7EV U1 to PMOD Connections
XCZU7EV (U1) Pin Net Name I/O Standard PMOD Pin
B23 PMOD0_0 LVCMOS18 J55.1
A23 PMOD0_1 LVCMOS18 J55.3
F25 PMOD0_2 LVCMOS18 J55.5
E20 PMOD0_3 LVCMOS18 J55.7
K24 PMOD0_4 LVCMOS18 J55.2
L23 PMOD0_5 LVCMOS18 J55.4
L22 PMOD0_6 LVCMOS18 J55.6
D7 PMOD0_7 LVCMOS18 J55.8
AN8 PMOD1_0 LVCMOS18 J87.1
AN9 PMOD1_1 LVCMOS18 J87.3
AP11 PMOD1_2 LVCMOS18 J87.5
AN11 PMOD1_3 LVCMOS18 J87.7
AP9 PMOD1_4 LVCMOS18 J87.2
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Xilinx ZCU106 Specifications

General

Brand	Xilinx
Model	ZCU106
Category	Motherboard
Language	English