Xilinx ZCU106 User Manual

ZCU106 Board User Guide 40
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
USB 3.0 Transceiver and USB 2.0 ULPI PHY
[Figure 2-1, callout 5]
The ZCU106 board uses a Standard Microsystems Corporation USB3320 USB 2.0 ULPI
transceiver at U116 to support a USB connection to the host computer (see Figure 3-3). A
USB cable 3.0 A to A is supplied in the ZCU106 evaluation kit (host computer USB 3.0 A port
to ZCU106 board connector J96). The USB3320 is a high-speed USB 2.0 PHY supporting the
UTMI+ low pin interface (ULPI) interface standard. The ULPI standard defines the interface
between the USB controller IP and the PHY device, which drives the physical USB bus. Use
of the ULPI standard reduces the interface pin count between the USB controller IP and the
PHY device.
The USB3320 is clocked by a 24 MHz crystal. See the Standard Microsystems Corporation
(SMSC) USB3320 data sheet for clocking mode details [Ref 16]. The interface to the
USB3320 PHY is implemented through the IP in the XCZU7EV MPSoC PS.
X-Ref Target - Figure 3-3
Figure 3-3: USB Interface
SM3320
USB2.0
USB
MIO
ULPI
USB3
Connector
USB
PS-GTR
PS-GTR Tx,Rx
X19172-050917
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Xilinx ZCU106 Specifications

General

Brand	Xilinx
Model	ZCU106
Category	Motherboard
Language	English