ZCU106 Board User Guide 55
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
Ethernet PHY Reset
The DP83867IRPAP PHY U98 reset circuit is shown in Figure 3-13. The DP83867IRPAP can be
reset by the SW9 pushbutton (U59.6), the MAX16025 U22 MPSoC PS-side POR reset device
(U59.1), or the I2C0 connected U97 TCA6416A I/O expander port P06 pin 10 (U59.3).
K29 MIO68_ENET_TX_D3 35 TX_D3
K30 MIO69_ENET_TX_CTRL 52 TX_EN_TX_CTRL
K31 MIO70_ENET_RX_CLK 43 RX_CLK
K32 MIO71_ENET_RX_D0 44 RX_DO
K33 MIO72_ENET_RX_D1 45 RX_D1
K34 MIO73_ENET_RX_D2 46 RX_D2
L29 MIO74_ENET_RX_D3 47 RX_D3
L30 MIO75_ENET_RX_CTRL 53 RX_DV_RX_CTRL
L33 MIO76_ENET_MDC 20 MDC
L34 MIO77_ENET_MDIO 21 MDIO
Table 3-14: DP83867 PHY Connections to XCZU7EV MPSoC (Cont’d)
XCZU7EV
(U1) Pin
Net Name
DP83867 PHY U98
Pin # Pin Name
X-Ref Target - Figure 3-13
Figure 3-13: Ethernet PHY Reset Circuit
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