ZCU106 Board User Guide 65
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
I2C1 (MIO 16-17)
The PS-side I2C1 interface provides access to I2C peripherals through a set of I2C switches.
The I2C1 PS-side connection is shared with the PL-side and the system controller.
Figure 3-18 shows a high-level view of the I2C1 bus connectivity represented in Table 3-23
and Table 3-24. TCA9548A U34 is set to 0x74 and TCA9548A U135 is set to 0x75.
U49 0x1A MAX15301 UTIL_3V3
U8 0x1B MAX15303 UTIL_5V0
SYSMON_SDA/SCL (U60 Port 3) (level-shifted via U137)
U1 0x32 U1 BANK 28 B20/A22
Table 3-22: I2C0 U60 Address 0x75 MUX Target Bus Connections (Cont’d)
Reference
Designator
Address Device
X-Ref Target - Figure 3-18
Figure 3-18: I2C1 Bus Topology
Bank 500
PS I2C1
Bank 65
MPS430
U1
U1
U41
TCA9548A
TCA9548A
U136
U45
I2C1_SDA/SCL
SDA/
SCL
SD0/SC0
SD1/SC1
SD2/SC2
SD3/SC3
SD4/SC4
SD0/SC0
SD1/SC1
SD2/SC2
SD3/SC3
SD4/SC4
SD5/SC5
SD6/SC6
SD7/SC7
IIC_EEPROM_SDA/SCL 0x34
SI5341_SDA/SCL
USER_S1570_SDA/SCL 0x5D
USER_MGT_SI570_SDA/SCL 0x5D
S15328_SDA/SCL
FMC_HPC0_IIC_SDA/SCL
FMC_HPC1_IIC_SDA/SCL
SYSMON_SDA/SCL
DDR4_SODIMM_SDA/SCL
Not Connected
Not Connected
SFP1_IIC_SDA/SCL
SFP0_IIC_SDA/SCL
U34
SDA/
SCL
U135
0x74
0x75
L/S
L/S
MIO17/
MIO16
PL I2C1
AL21/AH19
28 P4_1
29 P4_2
X19319-052417
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