Xilinx ZCU106

ZCU106 Board User Guide 139
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Appendix B: Master Constraints File Listing
set_propertyPACKAGE_PIN M13 [get_ports "FMC_HPC0_LA28_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA28_P"] ;
set_propertyPACKAGE_PIN J10 [get_ports "FMC_HPC0_LA29_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA29_N"] ;
set_propertyPACKAGE_PIN K10 [get_ports "FMC_HPC0_LA29_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA29_P"] ;
set_propertyPACKAGE_PIN D9 [get_ports "FMC_HPC0_LA30_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA30_N"] ;
set_propertyPACKAGE_PIN E9 [get_ports "FMC_HPC0_LA30_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA30_P"] ;
set_propertyPACKAGE_PIN E7 [get_ports "FMC_HPC0_LA31_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA31_N"] ;
set_propertyPACKAGE_PIN F7 [get_ports "FMC_HPC0_LA31_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA31_P"] ;
set_propertyPACKAGE_PIN E8 [get_ports "FMC_HPC0_LA32_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA32_N"] ;
set_propertyPACKAGE_PIN F8 [get_ports "FMC_HPC0_LA32_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA32_P"] ;
set_propertyPACKAGE_PIN C8 [get_ports "FMC_HPC0_LA33_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA33_N"] ;
set_propertyPACKAGE_PIN C9 [get_ports "FMC_HPC0_LA33_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA33_P"] ;
#HPC1 J4
set_propertyPACKAGE_PIN E23 [get_ports "FMC_HPC1_CLK0_M2C_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_CLK0_M2C_N"] ;
set_propertyPACKAGE_PIN F23 [get_ports "FMC_HPC1_CLK0_M2C_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_CLK0_M2C_P"] ;
set_propertyPACKAGE_PIN AJ5 [get_ports "FMC_HPC1_DP0_C2M_N"] ;
set_propertyPACKAGE_PIN AJ6 [get_ports "FMC_HPC1_DP0_C2M_P"] ;
set_propertyPACKAGE_PIN AK3 [get_ports "FMC_HPC1_DP0_M2C_N"] ;
set_propertyPACKAGE_PIN AK4 [get_ports "FMC_HPC1_DP0_M2C_P"] ;
set_propertyPACKAGE_PIN Y7 [get_ports "FMC_HPC1_GBTCLK0_M2C_C_N"] ;
set_propertyPACKAGE_PIN Y8 [get_ports "FMC_HPC1_GBTCLK0_M2C_C_P"] ;
set_propertyPACKAGE_PIN B19 [get_ports "FMC_HPC1_LA00_CC_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA00_CC_N"] ;
set_propertyPACKAGE_PIN B18 [get_ports "FMC_HPC1_LA00_CC_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA00_CC_P"] ;
set_propertyPACKAGE_PIN D24 [get_ports "FMC_HPC1_LA01_CC_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA01_CC_N"] ;
set_propertyPACKAGE_PIN E24 [get_ports "FMC_HPC1_LA01_CC_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA01_CC_P"] ;
set_propertyPACKAGE_PIN K23 [get_ports "FMC_HPC1_LA02_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA02_N"] ;
set_propertyPACKAGE_PIN K22 [get_ports "FMC_HPC1_LA02_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA02_P"] ;
set_propertyPACKAGE_PIN J22 [get_ports "FMC_HPC1_LA03_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA03_N"] ;
set_propertyPACKAGE_PIN J21 [get_ports "FMC_HPC1_LA03_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA03_P"] ;
set_propertyPACKAGE_PIN H24 [get_ports "FMC_HPC1_LA04_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA04_N"] ;
set_propertyPACKAGE_PIN J24 [get_ports "FMC_HPC1_LA04_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA04_P"] ;
set_propertyPACKAGE_PIN G26 [get_ports "FMC_HPC1_LA05_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA05_N"] ;
set_propertyPACKAGE_PIN G25 [get_ports "FMC_HPC1_LA05_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC1_LA05_P"] ;
set_propertyPACKAGE_PIN H22 [get_ports "FMC_HPC1_LA06_N"] ;
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