150 Sequoia Series
5.10 *SAV
This command stores the present state of the power source to a specified location in memory. Up to
8 states (including the transient list) can be stored in nonvolatile memory.
Command Syntax *SAV
Parameters 0 through 7
Related Commands PSC *RCL *RST
5.11 *SRE
This command sets the condition of the Service Request Enable Register. This register determines
which bits from the Status Byte Register (see *STB for its bit configuration) are allowed to set the
Master Status Summary (MSS) bit and the Request for Service (RQS) summary bit. A 1 in any Service
Request Enable Register bit position enables the corresponding Status Byte Register bit and all such
enabled bits then are logically ORed to cause Bit 6 of the Status Byte Register to be set. See paragraph
7.5 for more details concerning this process.
When the IEEE-488 BUS controller conducts a serial poll in response to SRQ, the RQS bit is cleared,
but the MSS bit is not. When *SRE is cleared (by programming it with 0), the source cannot generate
an SRQ to the controller.
Command Syntax *SRE <NRf>
Parameters 0 to 255
Default Value 0 (see *PSC command)
Example *SRE 255
Query Syntax *SRE?
Returned Paramters <NR1>(Register binary value)
Related Commands *ESE *ESR
5.12 *STB?
This query reads the Status Byte register, which contains the status summary bits and the Output
Queue MAV bit. Reading the Status Byte register does not clear it. The input summary bits are cleared
when the appropriate event registers are read (see chapter 7 for more information). A serial poll also
returns the value of the Status Byte register, except that bit 6 returns Request for Service (RQS)
instead of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it
indicates that the source has one or more reasons for requesting service.
Bit Configuration of Status Byte Register
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