182 Sequoia Series
does a serial poll, RQS is cleared inside the register and returned in bit position 6 of the response. The
remaining bits of the Status Byte register are not disturbed.
The MAV bit and Output Queue
The Output Queue is a first-in, first-out (FIFO) data register that stores power source-to-controller
messages until the controller reads them. Whenever the queue holds one or more bytes, it sets the
MAV bit (bit 4) of the Status byte register.
7.6 Examples
The following section contains examples of commonly used operations involving the status registers.
7.6.1 Determining the Cause of a Service Interrupt
You can determine the reason for an SRQ by the following actions:
Step 1 : Determine which summary bits are active. Use
*STB? or serial poll
Step 2 : Read the corresponding Event register for each summary bit to determine which events
caused the summary bit to be set. Use:
STATus:QUEStionable:EVENt?
STATus:OPERation:EVENt?
ESR?
Note: When an Event register is read, it is cleared. This also clears the corresponding
summary bit.
Step 3 : Remove the specific condition that caused the event. If this is not possible, the event may be
disabled by programming the corresponding bit of the status group Enable. A faster way to prevent
the interrupt is to disable the service request by programming the appropriate bit of the Service
Request Enable register.
7.6.2 Servicing Questionable Status Events
This example assumes you want a service request generated whenever the power source's
overvoltage, overcurrent, or overtemperature circuits have tripped. From Figure 7-1, note the required
path for Questionable Status conditions at bits 0, 1, and 3 to generate a service request (RQS) at the
Status Byte register. The required register programming is as follows:
Step 1 : Program the Questionable Status Enable register to allow the latched events to be summed
into the QUES summary bit. Use:
STATus:QUEStionable:ENABle 11
Step 2 : Program the Service Request Enable register to allow the QUES summary bit from the Status
Byte register to generate RQS. Use:
*SRE 8
Step 3 : When you service the request, read the event register to determine which Questionable Status
Event register bits are set and clear the register for the next event. Use:
STATus:QUEStionable:EVENt?
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