178 Sequoia Series
7. Status Registers
You can use status register programming to determine the operating condition of the power source at
any time. For example, you may program the power source to generate an interrupt (assert SRQ)
when an event such as a current limit occurs. When the interrupt occurs, your program can then act
on the event in the appropriate fashion.
Figure 7-1 shows the status register structure of the power source. Table 5-1 defines the status bits.
The Standard Event, Status Byte, and Service Request Enable registers as well as the Output Queue
perform standard IEEE-488 functions as defined in the IEEE 488.2 Standard Digital Interface for
Programmable Instrumentation. The Operation Status, and the Questionable Status registers,
implement functions that are specific to the power source.
7.1 Power-On Conditions
All status register groups are cleared at power on. This means all data bits and all Event Enable
register bits are cleared. It is possible however the set the PON mask in the Event enable register to
cause a SRQ. This can be accomplished using the *PSC command. Once set, this condition is retained
in non-volatile memory and will be recalled when power is applied to the power source. See paragraph
5.7 for details on the use of the *PSC command.
7.2 Operation Status Group
The Operation Status group records signals that occur during normal operation. The group consists of
the following registers:
Table 7-1: Operation Status Register
The outputs of the Operation Status register group are logically-ORed into the OPER(ation) summary
bit (7) of the Status Byte register.
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