Anritsu MP8931A - Page 145

Appendix A Specifications
A-3
Item Specifications
Input signal
Signal type
Data/Clock/Enable
Common to
data/clock en-
able
Level
<ECL> High: 0 to –1.0 V, Low: –1.5 to –2.5 V
<TTL> High: +1.8 to +5.0 V, Low: 0 to +1.0 V
<Variable> Shown below
Termination
voltage condi-
tions
ECL: –2 V, TTL: GND
Variable: –2.5 to +3.3 V (user-defined)
Resolution: 0.1 V
Threshold
voltage condi-
tions
ECL: –1.3 V, TTL: +1.4 V
Variable: –2 to +3 V (user-defined)
Resolution: 0.1 V
Termination
75
Ω
/1 M
Ω
Polarity
switching
Data: Positive, Negative
Clock: Rise, Fall
Enable: Positive, Negative, Off
CLK (Rise)
Data
Data/enable
Waveform
NRZ
Clock
Frequency
1 kHz to 155 MHz, Accuracy:
±
100 ppm
Duty
50%
±
10%
Pulse width
3 ns or more
Phase
Data/Enable
Clock (Rise)
t
| t |
≤
T/10
Data/Enable
Clock (Fall)
t
| t |
≤
T/10