ARM Cortex-A9 MBIST User Manual

ii Copyright © 2008 ARM Limited. All rights reserved. ARM DDI 0414C
Non-Confidential
Restricted Access
Cortex-A9 MBIST Controller
Technical Reference Manual
Copyright © 2008 ARM Limited. All rights reserved.
Release Information
The following changes have been made to this book.
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Product Status
The information in this document is final, that is for a developed product.
Change history
Date Issue Confidentiality Change
02 April 2008 A Non-Confidential First release for r0p0
10 July 2008 B Non-Confidential Restricted Access Second release for r0p0
15 December 2008 C Non-Confidential Restricted Access First release for r1p0

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST