ARM Cortex-A9 MBIST User Manual

MBIST Instruction Register
ARM DDI 0414C Copyright © 2008 ARM Limited. All rights reserved. 3-11
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3.2.6 DataWord field, MBIR[27:24]
DataWord is the 4-bit data seed field that supplies the background data for the test
algorithm at instruction load.
Note
In the Go/No-Go algorithm, the Read Write Read March (y-fast) and Bang algorithms
do not use the data seed value. Table 3-2 on page 3-6 shows the data that the Go/No-Go
algorithm uses.
The data seed enables you to select values stored into arrays for I
DDQ
ATPG, or to select
data words to search for unexpected sensitivities during march or bit-line stress tests.
The MBIST engine replicates the four bits of data 16 times to give the full 64 bits of
data required on the MBISTDIN[63:0] port of the MBIST interface.
3.2.7 ArrayEnables field, MBIR[23:4]
Table 3-9 shows how each bit in the ArrayEnables field selects the cache RAM array to
be tested. You can select only one array at a time. Selecting multiple arrays produces
unpredictable behavior.
b0110 6
b0111 7
b1000 8
b1001 9
b1010 10
>b1010 Reserved
Table 3-8 MaxYAddr field encoding (continued)
MaxYAddr MBIR[31:28] Number of counter bits
Table 3-9 ArrayEnables field encoding
ArrayEnables MBIR[23:4] RAM name
b00000000000000000001 BTAC RAM control array 0 and target array 0
b00000000000000000010 BTAC RAM control array 1 and target array 1
b00000000000000000100 Instruction tag RAM arrays 0 and 1

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST