ARM Cortex-A9 MBIST User Manual

Preface
xii Copyright © 2008 ARM Limited. All rights reserved. ARM DDI 0414C
Non-Confidential
Restricted Access
About this book
This book is for the Cortex-A9 MBIST controller.
In this book, the generic term MBIST controller means the Cortex-A9 MBIST
controller, and Cortex-A9 processor means the Cortex-A9 processor family.
Product revision status
The rnpn identifier indicates the revision status of the product described in this manual,
where:
rn Identifies the major revision of the product.
pn Identifies the minor revision or modification status of the product.
Intended audience
This book is written for hardware engineers who are familiar with ARM technology and
want to use the MBIST controller to test the RAM blocks used by the Cortex-A9
processor. The AXI protocol is not specified, but some familiarity with AXI is assumed.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
Read this for an introduction to MBIST technology.
Chapter 2 Functional Description
Read this for a description of the Cortex-A9 processor interface to the
MBIST controller and MBIST testing of the data RAM and tag RAMs.
Also read this chapter for a description of the timing sequences for
loading MBIST instructions, starting the MBIST test, detecting failures,
and retrieving the data log.
Chapter 3 MBIST Instruction Register
Read this for a description on how to use the MBIST Instruction Register
to configure the mode of operation of the MBIST engine.
Chapter 4 MBIST Datalog Register
Read this for a description of the MBIST Datalog Register.

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST