ARM Cortex-A9 MBIST User Manual

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MBIST Datalog Register

Restricted Access Non-Confidential

4.2 Field descriptions

These are the fields in the MBIST Datalog Register:

Datalog[78:68] 11 bits that contain the failing address.

Datalog[67:4] 64 bits that contain an XOR between failing data and correct data.

All bits at1’b1 are failing.

Datalog[3:0] 4 bits that contain the expected data seed.

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General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST