ARM Cortex-A9 MBIST User Manual

Functional Description
ARM DDI 0414C Copyright © 2008 ARM Limited. All rights reserved. 2-19
Restricted Access Non-Confidential
Figure 2-21 End of bitmap data log retrieval
Loading a new instruction resets bitmap mode.
D[76] D[77] D[78]
CLK
MBISTRESULT[1]
MBISTDSHIFT
MBISTRESULT[5:2]
MBISTRUN

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST