ARM Cortex-A9 MBIST User Manual

MBIST Instruction Register
3-6 Copyright © 2008 ARM Limited. All rights reserved. ARM DDI 0414C
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Read Write March (x-fast or y-fast)
(w0) (r0, w1) ⇓ (r1, w0) (r0)
Read Write Read March (x-fast or y-fast)
(w0) (r0, w1, r1) ⇓ (r1, w0, r0) (r0)
Bang This test is always performed in x-fast. It executes multiple consecutive
writes and reads effectively stressing a bit-line pair. While this pattern
does detect stuck-at faults, its primary intent is to address the analog
characteristics of the memory. In the following algorithm description,
row 0 indicates a read or write of the data seed to the sacrificial row, this
is always the first row of the column being addressed.
(w0) (r0, w0, w0(row 0) × 6) (r0 × 5, w0(row 0), r0) (r0)
Go/No-Go If you do not want to implement your own memory test strategy, use the
Go/No-Go test pattern that performs the algorithms that Table 3-2 shows.
This test suite provides a comprehensive test of the arrays. The series of
tests in Go/No-Go are the result of the experience in memory testing by
ARM memory test engineers.
Table 3-2 Go/No-Go test pattern
Sequence Algorithm Data
1 Write Checkerboard Data seed
2 Read Checkerboard Data seed
3 Write Checkerboard Data seed
4 Read Checkerboard Data seed
5 Read Write Read March (y-fast)
0x6
6Bang 0xF

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST