MBIST Instruction Register
ARM DDI 0414C Copyright © 2008 ARM Limited. All rights reserved. 3-5
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Pattern specification
This section describes the MBIST test patterns. An x-fast pattern increments or
decrements the X-address counter first. A y-fast pattern increments or decrements the
Y-address counter first. MaxXAddr and MaxYAddr fields, MBIR[35:32] and
MBIR[31:28] on page 3-9 describes the X-address and Y-address counters.
The first four patterns are useful for data retention or I
DDQ
testing.
Write Solids This initializes the RAM with the supplied data seed.
Read Solids This reads each RAM location once expecting the supplied data seed.
Write Checkerboard
This initializes the RAM with a physical checkerboard pattern created by
alternating the supplied data seed and its inverse.
Read Checkerboard
This reads back the physical checkerboard pattern created by alternating
the supplied data seed and its inverse.
For the next set of patterns, the following notation describes the algorithm:
• 0 represents the data seed
• 1 represents the inverse data seed
• w indicates a write operation
• r indicates a read operation
• ⇑indicates that the address is incremented
• ⇓ indicates that the address is decremented.
March C+ (x-fast or y-fast)
This is the industry-standard March C+ algorithm:
(w0) (r0, w1, r1) (r1, w0, r0)
⇓
(r0, w1, r1)
⇓
(r1, w0, r0) (r0)
b001000 Read Write Read March (x-fast) 8N Read write read march pattern, incrementing X-address first
b001001 Read Write Read March (y-fast) 8N Read write read march pattern, incrementing y-address first
b001010 Bang 18N Bit-line stress pattern
b111111 Go/No-Go 30N See Table 3-2 on page 3-6
Table 3-1 Pattern field encoding (continued)
Pattern
MBIR[57:52] Algorithm name N Description
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