ARM Cortex-A9 MBIST User Manual

ARM DDI 0414C Copyright © 2008 ARM Limited. All rights reserved. 2-1
Restricted Access Non-Confidential
Chapter 2
Functional Description
This chapter contains a functional overview of the MBIST controller implementation,
and a description of its functional operation. It includes timing sequences for loading
instructions, starting the MBIST engine, detecting failures, and retrieving the data log.
It contains the following sections:
• Functional overview on page 2-2
• Functional operation on page 2-15.

ARM Cortex-A9 MBIST Specifications

General

Architecture	ARMv7-A
Clock Speed	Up to 2 GHz
Memory Management Unit	Yes
TrustZone	Yes
Core Count	1-4
Instruction Set	ARM, Thumb-2
Pipeline	8-stage
Floating Point Unit	VFPv3
NEON	Optional
L1 Cache	32KB Instruction, 32KB Data, per core
MBIST	Built-in Memory BIST