308
2467S–AVR–07/09
ATmega128
Reset Register The Reset Register is a Test Data Register used to reset the part during programming. It is
required to reset the part before entering programming mode.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is
reset as long as there is a high value present in the Reset Register. Depending on the Fuse set-
tings for the clock options, the part will remain reset for a Reset Time-Out Period (refer to “Clock
Sources” on page 37) after releasing the Reset Register. The output from this Data Register is
not latched, so the reset will take place immediately, as shown in Figure 123 on page 254.
Programming Enable
Register
The Programming Enable Register is a 16-bit register. The contents of this register is compared
to the programming enable signature, binary code 1010_0011_0111_0000. When the contents
of the register is equal to the programming enable signature, programming via the JTAG port is
enabled. The Register is reset to 0 on Power-on Reset, and should always be reset when leav-
ing Programming mode.
Figure 147. Programming Enable Register
TDI
TDO
D
A
T
A
=
DQ
ClockDR & PROG_ENABLE
Programming enable
$A370
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