80
2467S–AVR–07/09
ATmega128
Note: 1. When enabled, the Two-wire Serial Interface enables Slew-Rate controls on the output pins
PD0 and PD1. This is not shown in this table. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
Table 37. Overriding Signals for Alternate Functions PD7..PD4
Signal Name PD7/T2 PD6/T1 PD5/XCK1 PD4/ICP1
PUOE 0 0 0 0
PUOV 0 0 0 0
DDOE 0 0 0 0
DDOV 0 0 0 0
PVOE 0 0 UMSEL1 0
PVOV 0 0 XCK1 OUTPUT 0
DIEOE 0 0 0 0
DIEOV 0 0 0 0
DI T2 INPUT T1 INPUT XCK1 INPUT ICP1 INPUT
AIO – – – –
Table 38. Overriding Signals for Alternate Functions in PD3..PD0
(1)
Signal Name PD3/INT3/TXD1 PD2/INT2/RXD1 PD1/INT1/SDA PD0/INT0/SCL
PUOE TXEN1 RXEN1 TWEN TWEN
PUOV 0 PORTD2 • PUD
PORTD1 • PUD PORTD0 • PUD
DDOE TXEN1 RXEN1 TWEN TWEN
DDOV 1 0 SDA_OUT SCL_OUT
PVOE TXEN1 0 TWEN TWEN
PVOV TXD1 0 0 0
DIEOE INT3 ENABLE INT2 ENABLE INT1 ENABLE INT0 ENABLE
DIEOV 1 1 1 1
DI INT3 INPUT INT2 INPUT/RXD1 INT1 INPUT INT0 INPUT
AIO – – SDA INPUT SCL INPUT
To Next Page
Loading...
Need help?
General
