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2467S–AVR–07/09

ATmega128

TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state

machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

• TCK, ADC4 – Port F, Bit 4

ADC4, Analog to Digital Converter, Channel 4

TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is

enabled, this pin can not be used as an I/O pin.

• ADC3 – ADC0 – Port F, Bit 3..0

Analog to Digital Converter, Channel 3..0.

Table 43. Overriding Signals for Alternate Functions in PF7..PF4

Signal

Name PF7/ADC7/TDI PF6/ADC6/TDO PF5/ADC5/TMS PF4/ADC4/TCK

PUOE JTAGEN JTAGEN JTAGEN JTAGEN

PUOV 1 0 1 1

DD OE J TAG EN JTAGEN JTAGEN JTAGEN

DDOV 0 SHIFT_IR +

SHIFT_DR

PVOE 0 JTAGEN 0 0

PVOV 0 TDO 0 0

DI EOE J TAG EN JTAGEN JTAG EN JTAGEN

DIEOV 0 0 0 0

DI – – – –

AIO TDI/ADC7 INPUT ADC6 INPUT TMS/ADC5

INPUT

TCK/ADC4

INPUT

Table 44. Overriding Signals for Alternate Functions in PF3..PF0

Signal Name PF3/ADC3 PF2/ADC2 PF1/ADC1 PF0/ADC0

PUOE0000

PUOV0000

DDOE0000

DDOV0000

PVOE0000

PVOV0000

DIEOE0000

DIEOV0000

DI––––

AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT

Atmel ATmega128 User Manual

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