150
7647H–AVR–03/12
Atmel ATmega16/32/64/M1/C1
14.15 Interrupts
This section describes the specifics of the interrupt handling as performed in
ATmega16/32/64/M1/C1.
14.15.1 Interrupt Vector
PSC provides 2 interrupt vectors:
• PSC_End (End of Cycle): When enabled and when a match with POCR_RB occurs
• PSC_Fault (Fault Event): When enabled and when a PSC input detects a Fault event.
14.15.2 PSC Interrupt Vectors in ATmega16/32/64/M1/C1
Table 14-6. Output Clock versus Selection and Prescaler
PCLKSELn PPREn1 PPREn0 CLKPSCn output
000CLK I/O
001CLK I/O / 4
010CLK I/O / 32
011CLK I/O / 256
100CLK PLL
101CLK PLL / 4
110CLK PLL / 32
111CLK PLL / 256
Table 14-7. PSC Interrupt Vectors
Vector
No.
Program
Address Source Interrupt Definition
-- --
5 0x0004 PSC_Fault PSC Fault event
6 0x0005 PSC_End PSC End of Cycle
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