Atmel ATmega32M1 User Manual

174
7647H–AVR–03/12
Atmel ATmega16/32/64/M1/C1
16.2.5.3 Error Signalling
If one or more errors are discovered by at least one node using the above mechanisms, the cur-
rent transmission is aborted by sending an "error flag". This prevents other nodes accepting the
message and thus ensures the consistency of data throughout the network. After transmission
of an erroneous message that has been aborted, the sender automatically re-attempts
transmission.
16.3 CAN Controller
The CAN controller implemented into ATmega16/32/64/M1/C1 offers V2.0B Active.
This full-CAN controller provides the whole hardware for convenient acceptance filtering and
message management. For each message to be transmitted or received this module contains
one so called message object in which all information regarding the message (e.g. identifier,
data bytes etc.) are stored.
During the initialization of the peripheral, the application defines which messages are to be sent
and which are to be received. Only if the CAN controller receives a message whose identifier
matches with one of the identifiers of the programmed (receive-) message objects the message
is stored and the application is informed by interrupt. Another advantage is that incoming remote
frames can be answered automatically by the full-CAN controller with the corresponding data
frame. In this way, the CPU load is strongly reduced compared to a basic-CAN solution.
Using full-CAN controller, high baudrates and high bus loads with many messages can be
handled.

Atmel ATmega32M1 Specifications

General

Architecture	8-bit AVR
Flash Memory	32 KB
SRAM	2 KB
EEPROM	1 KB
Clock Speed	16 MHz
GPIO Pins	32
I/O Pins	32
ADC Channels	8
ADC Resolution	10-bit
UART	1
USART	1
SPI	1
I2C	1
PWM Channels	6
CAN	1
Operating Voltage	2.7V - 5.5V
Operating Temperature	-40°C to +85°C
Temperature Range	-40°C to +85°C
Package	44-TQFP, 44-QFN

Summary

Features

AVR CPU Core

Reset and Interrupt Handling

Explanation of interrupt sources, vectors, priority levels, and behavior during interrupt execution.

System Clock

System Clock Prescaler

Details on the CLKPR register for dividing the system clock to reduce power consumption and affect peripheral frequencies.

Power Management and Sleep Modes

8-bit Timer/Counter0 with PWM

Modes of Operation

Detailed explanation of Normal, CTC, and various PWM modes for Timer/Counter0 operation.

Controller Area Network - CAN

CAN Protocol

Explanation of the CAN protocol principles, standards, and message transmission priorities.

Error Management

Description of error detection mechanisms (message and bit level) and fault confinement states.

Analog to Digital Converter - ADC

Features

List of ADC capabilities including resolution, accuracy, conversion time, input channels, and reference voltages.

Starting a Conversion

Procedures for initiating ADC conversions, including single conversion and auto-triggering modes.

debugWIRE On-chip Debug System

Features

Overview of debugWIRE capabilities including program flow control, real-time operation, and symbolic debugging.

Boot Loader Support – Read-While-Write Self-Programming ATmega16/32/64/M1/C1

Self-Programming the Flash

Procedures and considerations for programming the Flash memory using the SPM instruction.

Memory Programming

Program And Data Memory Lock Bits

Fuse Bits

Electrical Characteristics

Absolute Maximum Ratings*

Critical voltage, current, and temperature limits that must not be exceeded for device reliability.

DC Characteristics

Instruction Set Summary

Register Summary