Atmel ATmega32M1

192
7647H–AVR–03/12
Atmel ATmega16/32/64/M1/C1
16.10.6 CAN Enable Interrupt MOb Registers - CANIE2 and CANIE1
• Bits 5:0 - IEMOB5:0: Interrupt Enable by MOb
– 0 - interrupt disabled.
– 1 - MOb interrupt enabled
Note: Example: CANIE2 = 0000 1100
b
: enable of interrupts on MOb 2 & 3.
• Bit 15:6 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, it must be written to
zero when CANIE1 & CANIE2 are written.
16.10.7 CAN Status Interrupt MOb Registers - CANSIT2 and CANSIT1
• Bits 5:0 - SIT5:0: Status of Interrupt by MOb
– 0 - no interrupt.
– 1- MOb interrupt.
Note: Example: CANSIT2 = 0010 0001
b
: MOb 0 & 5 interrupts.
• Bit 15:6 – Reserved Bits
These bits are reserved for future use.
16.10.8 CAN Bit Timing Register 1 - CANBT1
• Bit 7– Reserved Bit
This bit is reserved for future use. For compatibility with future devices, it must be written to zero
when CANBT1 is written.
Bit 76543210
- - IEMOB5 IEMOB4 IEMOB3 IEMOB2 IEMOB1 IEMOB0 CANIE2
--------CANIE1
Bit 151413121110 9 8
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Read/Write R R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
- - SIT5 SIT4 SIT3 SIT2 SIT1 SIT0 CANSIT2
--------CANSIT1
Bit 151413121110 9 8
Read/Write R R R R R R R R
Initial Value00000000
Read/Write R R R R R R R R
Initial Value00000000
Bit 76543210
- BRP5 BRP4 BRP3 BRP2 BRP1 BRP0 - CANBT1
Read/Write - R/W R/W R/W R/W R/W R/W -
Initial Value - 0 0 0 0 0 0 -