Chapter 4. Ladder Diagram (LD) Programming
152 PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual GFK-2950C
Command Block Structure
Data Block Length
(in words)
The number of data words starting with the data at address+6 to the
end of the command block, inclusive. The data block length ranges
from 1 to 128 words. Each COMMREQ command has its own data
block length. When entering the data block length, you must ensure
that the command block fits within the register limits
Must be set to 0 (No Wait)
Status Pointer
Memory Type
Specifies the memory type for the location where the COMMREQ
status word (CSR) returned by the device will be written when the
COMMREQ completes.
The word at address + 3 contains the offset for the status word
within the selected memory type.
Note: The status pointer offset is a zero-based value. For example,
%R00001is at offset zero in the register table.
This parameter is ignored in No Wait mode.
Maximum
Communication Time
This parameter is ignored in No Wait mode.
Address + 6
to Address + 133
The data block contains the command's parameters. The data block
begins with a command number in address + 6, which identifies the
type of communications function to be performed. Refer to the
specific device manual for COMMREQ command formats.
Status Pointer Memory Type
Status pointer memory type contains a numeric code that specifies the user reference memory type
for the status word. The table below shows the code for each reference type:
Discrete input table (BIT mode)
Discrete output table (BIT mode)
Discrete input table (BYTE mode)
Discrete output table (BYTE mode)
Notes:
■ The value entered determines the mode. For example, if you enter the %I bit mode is 70, then the
offset will be viewed as that bit. On the other hand, if the %I value is 16, then the offset will be
viewed as that byte.
■ The high byte at address + 2 should contain zero.