Chapter 4. Ladder Diagram (LD) Programming
72 PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual GFK-2950C
The value that the step number is set to when R is energized.
Default value is 1. 1 N Length. If N < 1, the step number will be
reset to 1 when R is energized. If N > Length, the step number will
be reset to Length. Must be an integer variable or constant.
All except variables
located in %S - %SC
Contains the first word of the bit sequencer.
If ST is not used, the Bit Sequencer function operates as
described above, except that no bits are set or cleared. The
function just cycles the current step number (in word 1 of the
control block) through its allowed range.
If ST is in %M memory and the Length is 3, the bit sequencer
occupies 3 bits; the other 5 bits of the byte are not used. If ST is in
%R memory, and the Length is 17, the bit sequencer uses 4 bytes,
all of %R1 and %R2.
All except constants,
flow, and variables
located in %S
Example
In the following example, a #FST_SCN system variable is used to set CLEAR to ON for one scan. This
sets the step number in Word 1 of the Bit Sequencer’s control block to an initial value of 3.
The Bit Sequencer operates on register memory %R00001. Its control block is stored in registers
%R0010, %R0011, and %R0012. When CLEAR is active, the sequencer is reset and the current step is
set to step number 3, as specified in N. The third bit of %R0001 is set to one and the other seven bits
are set to zero.
When NXT_CYC is active and CLEAR is not active, the bit for step number 3 is cleared and the bit for
step number 2 or 4 (depending on whether DIRECTION is energized) is set.
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