Intel Arria 10 FPGA - Page 27

Controls Description
Page Select Register (PSR) — Read/Write
Page Select Switch (PSS) — Read only
MAX Ver: Indicates the version of MAX V code currently running on the
board.
JTAG Chain Shows all the devices currently in the JTAG chain.
Qsys Memory Map Shows the memory map of the Qsys system on your board.
4. Board Test System
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10 FPGA Development Kit User Guide
27