Intel Arria 10 FPGA User Manual

Board Reference Type Description
Communication Ports
J9 Gbps Ethernet RJ-45 connector RJ-45 connector which provides a 10/100/1000 Ethernet
connection via a Marvell 88E1111 PHY and the FPGA-based
Altera Triple Speed Ethernet MAC MegaCore function in SGMII
mode.
J18 QSFP interface Provides four transceiver channels for a 40G QSFP module.
J12 SFP+ connector SFP+ XCVR interface.
J3 Micro-USB connector Embedded Altera USB-Blaster II JTAG for programming the
FPGA via a USB cable.
Board Reference Type Description
Display Ports
J5 DisplayPort connector Molex 0.50mm pitch DisplayPort male receptacle, right angle,
surface mount, 0.76µm gold plating, 20 circuits with cover.
B2 Character LCD Connector which interfaces to the provided 16 character × 2
line LCD module.
J20, J21 SDI video port Two sub-miniature version B (SMB) connectors that provide a
full-duplex SDI interface.
Board Reference Type Description
Power Supply
J22 PCI Express edge connector Interfaces to a PCI Express root port such as an appropriate PC
motherboard.
J13 DC input jack Accepts a 12-V DC power supply. Do not use this input jack
while the board is plugged into a PCI Express slot.
SW1 Power Switch Switch to power on or off the board when power is supplied
from the DC input jack.
J4 PCIe 2x4 ATX power connector 12-V ATX input. This input must be connected when the board
is plugged into a PCIe root port.
6.2. MAX V CPLD System Controller
The board utilizes the EPM2210 System Controller, an Altera MAX V CPLD, for the
following purposes:
• FPGA configuration from flash memory
• Power consumption monitoring
• Temperature monitoring
• Fan control
• Control registers for clocks
• Control registers for remote update system
6. Board Components
683526 | 2023.07.12
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Intel
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Arria
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10 FPGA Development Kit User Guide
59

Intel Arria 10 FPGA Specifications

General

Brand	Intel
Model	Arria 10 FPGA
Category	Microcontrollers
Language	English