Intel Arria 10 FPGA User Manual

4.4.5. The XCVR Tab
This tab allows you to perform loopback tests on the QSFP, SFP, SMA, and SDI ports.
Figure 19. The XCVR Tab
Control Description
Status Displays the following status information during a loopback test:
PLL lock—Shows the PLL locked or unlocked state.
Pattern sync—Shows the pattern synced or not synced state. The pattern is considered
synced when the start of the data sequence is detected.
Details—Shows the PLL lock and pattern sync status:
Port Allows you to specify which interface to test. The following port tests are available:
continued...
4. Board Test System
683526 | 2023.07.12
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10 FPGA Development Kit User Guide
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Intel Arria 10 FPGA Specifications

General

Brand	Intel
Model	Arria 10 FPGA
Category	Microcontrollers
Language	English