Intel Arria 10 FPGA - Page 73

Board Reference Schematic Signal Name FPGA Pin Number I/O Standard
19 MF1_AUTO_SLEEP AY32 1.8 V
21 MF2_MUTE AY35 1.8 V
22 MF3_XSD — —
6 MODE_SEL — —
11 MUTEREF — —
4 SDI_EQIN_N1 — —
3 SDI_EQIN_P1 — —
14 SDO_N / SDI_RX_N H39 High Speed Differential I/O
15 SDO_P / SDI_RX_P H40 High Speed Differential I/O
6. Board Components
683526 | 2023.07.12
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10 FPGA Development Kit User Guide
73