Keithley 2016 - Error Queue; Figure 4-10 Status Byte and Service Request (SRQ); Status Byte and Service Request (SRQ)

Error queue
The Error Queue holds error and status messages. When an error or status event occurs, a
message that defines the error/status is placed n the Error Queue. This queue will hold up to 10
messages.
When a message is placed in the Error Queue, the Error Available (EAV) bit in the Status Byte
Register is set. An error message is cleared from the Error/Status Queue when it is read. The
Error Queue is considered cleared when it is empty. An empty Error Queue clears the EAV bit
in the Status Byte Register. Read an error message from the Error Queue by sending either of
the following SCPI query commands and then addressing the Model 2016 to talk:
• :SYSTem:ERRor?
• :STATus:QUEue
See Section 5 for complete information about reading error messages.
Status byte and service request (SRQ)
Service request is controlled by two 8-bit registers: the Status Byte Register and the Service
Request Enable Register. Figure 4-10 shows the structure of these registers.
F
igure 4-10
Status byte and
service request
(SRQ)
Status Summary Messages
* STB?
Serial Poll
OSB
(B7)
RQS
(B6)
MSS
ESB
(B5)
MAV
(B4)
QSB
(B3)
EAV
(B2)
(B1) (B0)
OR
* SRE
* SRE?
Status Byte
Register
Service
Request
Enable
Register
OSB = Operation Summary Bit
MSS = Master Summary Status
RQS = Request for Service
ESB = Event Summary Bit
MAV = Message Available
QSB = Questionable Summary Bit
EAV = Error Available
MSB = Measurement Summary Bit
& = Logical AND
OR = Logical OR
OSB
(B7) (B6)
ESB
(B5)
MAV
(B4)
QSB
(B3)
EAV
(B2)
(B1) (B0)
&
&
&
&
&
MSB
MSB
&
Service
Request
Generation
Read by Serial Poll
Read by *STB?
Remote Operation 4-21