Keysight 16860 Series Portable Logic Analyzer Service Guide 55
Testing 16860 Performance 3
7 For this Pod's Clock, record the generator frequency and the Data Rate in the "Maximum State
Data Rate" section of the “Performance Test Record" on page 77. Remember that the data rate is
twice the generator frequency.
Pod 3 Clock - Maximum Clock Rate
1Load the MultipleClocks_NoMarker.ala configuration file. If asked to save the current configuration
file, click No.
2 Disconnect the U4203A Flying Lead Probe Set from channels 1 & 2 of the 81134A pulse
generator output (Bits 2, 6, 10, 14) and clock leads.
3 Connect the probe set from Pod 3 of logic analyzer to the pulse generator channels 1 & 2 output.
• Clock to Channel 1 Output
• Clock (NOT) Channel 1 Output (not)
• Bits 2 & 10 to Channel 2 Output
• Bits 6 & 14 to Channel 2 Output (not)
4Open the Sampling tab in the Analyzer Setup dialog by clicking the Sampling Setup Icon.
5 In the clock assignment area, set Pod 1 Clock to Don't Care and set Pod 3 Clock to Both Edges.
6 Close the dialog by clicking OK.
7 Set the generator frequency to 357 MHz as a starting point.
8Click the Run Repetitive toolbar button to start a repetitive run on the logic analyzer for
acquiring data repeatedly. Acquired data will start appearing in the Listing window.
9 Start increasing the frequency on the pulse generator by 1 MHz increments while simultaneously
observing the logic analyzer data acquisition status.
10 Continue increasing the generator frequency until the logic analyzer displays an error that the
data could not be displayed, or the clock is too fast. It is possible that the error is caused by noise
introduced as the generator frequency is changed.
This section is only applicable to models: 16862A, 16863A & 16864A.
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