Keysight Technologies 16861A - Single Clock both Edges - Maximum Clock Rate

3 Testing 16860 Performance
70 Keysight 16860 Series Portable Logic Analyzer Service Guide
4 If either of these messages occur, the generator frequency should be lowered, Eye Scan rerun
and the test rerun.
5 Lower the generator frequency by 1 MHz and rerun the test.
6 After the analyzer runs for about 1 minute select the Stop button to stop the acquisition. If
the "can't find occurrence" window does not appear, then the analyzer has found good data.
7 For Single Clock for Falling Edge, record the generator frequency and the Data Rate in the
"Maximum State Data Rate" section of the “Performance Test Record. Note: For Single Edge
Clocking, the data rate is the same as the generator frequency.
Single Clock Both Edges - Maximum Clock Rate
1Load the SingleClock_NoMarker.ala configuration file. If asked to save the current configuration file,
click No.
2 Verify that the Generator is set to 714 MHz as a starting point.
3 Open the Sampling tab in the Analyzer Setup dialog by clicking the Sampling Setup Icon.
4 In the clock assignment area, set Pod 1 Clock to Both Edges.