Basic System Configuration Guide System Management
Edition: 01 3HE 11010 AAAC TQZZA 227
Entering a show CLI command on a port with ACR displays the mean and standard
deviation values for the previous 60-second interval. A show detail command on the
same port displays the previous 15 sets of 60-second intervals and a list of state and
event counts. An SNMP MIB is also available with these statistics.
6.4.4 Differential Clock Recovery (DCR)
Differential Clock Recovery (DCR) is an alternative method to ACR to maintain the
service clock across the packet network for a circuit emulated service. DCR is
supported on:
• 16-port T1/E1 ASAP Adapter card, version 2
• 32-port T1/E1 ASAP Adapter card
• 4-port OC3/STM1 / 1-port OC12/STM4 Adapter card (DS1/E1 channels)
• 4-port DS3/E3 Adapter card (clear channel DS3/E3 ports and DS1/E1 channels
on channelized DS3 ports (E3 ports cannot be channelized)); DCR on DS1/E1
channels is supported only on the first three ports of the card
• 7705 SAR-M (variants with T1/E1 ports)
• 7705 SAR-A (variant with T1/E1 ports)
• T1/E1 ports of the 4-port T1/E1 and RS-232 Combination module
• T1/E1 ports on the 7705 SAR-X
In addition, DCR is supported between TDM SAPs and Ethernet SAPs and between
TDM SAPs and spoke SDPs in a MEF 8 configuration for the above platforms,
adapter cards, and modules. Refer to the 7705 SAR Services Guide, “MEF 8”, for
information on MEF 8.
DCR is not supported on DS1 or E1 channels that have CAS signaling enabled.
DCR uses channel group 1 for timing recovery. If a T1 or E1 port is channelized, all
TDM PWs that share the port use the timing recovered from channel group 1.
To enable DCR, the network must have a common clock between the routers
performing the TDM-to-packet interworking function or between the two terminating
SAPs or SAP/spoke SDP using MEF 8. The common clock can come from two
PRC-traceable clocks or one clock that is made available to both ends, such as the
transmitted clock of a SONET/SDH or synchronous Ethernet port.
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