Basic System Configuration Guide
Edition: 01 3HE 11010 AAAC TQZZA 11
List of Figures
3 CLI Usage ......................................................................................19
Figure 1 Root Commands........................................................................................20
Figure 2 Operational Root Commands....................................................................21
Figure 3 CLI Display for CLI Tree Help....................................................................29
5 Boot Options...............................................................................129
Figure 4 System Initialization - Part 1....................................................................133
Figure 5 Files on the Compact Flash.....................................................................134
Figure 6 System Initialization - Part 2....................................................................136
Figure 7 System Initialization With ADP ................................................................137
Figure 8 System Startup Flow ...............................................................................147
Figure 9 7705 SAR Console Port ..........................................................................151
6 System Management .................................................................193
Figure 10 MC-LAG at Access and Aggregation Sites..............................................208
Figure 11 BITS Timing Source Path........................................................................222
Figure 12 Differential Clock Recovery on a Network...............................................228
Figure 13 Proprietary Clock Recovery.....................................................................230
Figure 14 Messaging Sequence Between the PTP Slave Clock and PTP
Master Clocks..........................................................................................236
Figure 15 PTP Slave Clock and Master Clock Synchronization Timing
Computation ............................................................................................237
Figure 16 Slave Clock..............................................................................................239
Figure 17 Ordinary Slave Clock Operation..............................................................240
Figure 18 PTP Master Clock....................................................................................241
Figure 19 Ordinary Master Clock Operation............................................................242
Figure 20 Boundary Clock .......................................................................................243
Figure 21 Boundary Clock Operation ......................................................................244
Figure 22 Synchronization Certain/Uncertain States...............................................253
Figure 23 Timing Reference Selection Based on Quality Level ..............................261
Figure 24 System Configuration and Implementation Flow.....................................267