System Management
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Basic System Configuration Guide
3HE 11010 AAAC TQZZA Edition: 01
Figure 14 Messaging Sequence Between the PTP Slave Clock and PTP
Master Clocks
6.4.6.1 PTP Clock Synchronization
The IEEE 1588v2 standard synchronizes the frequency and time from a master clock
to one or more slave clocks over a packet stream. This packet-based
synchronization can be over UDP/IP or Ethernet and can be multicast or unicast. For
UDP/IP, only IPv4 unicast mode with unicast negotiation is supported.
As part of the basic synchronization timing computation, a number of event
messages are defined for synchronization messaging between the PTP slave clock
and PTP master clock. A one-step or two-step synchronization operation can be
used, with the two-step operation requiring a follow-up message after each
synchronization message. Currently, only one-step operation is supported when the
7705 SAR is a master clock; PTP frequency and time can be recovered from both
one-step and two-step operation when the 7705 SAR is acting as a slave or
boundary clock.
TimeTime
Slave ClockMaster Clock 2
Time
Master Clock 1
Signaling (Request Announce)
Signaling (Announce Granted)
20502
Signaling (Request Announce)
Signaling (Announce Granted)
Signaling (Announce Granted)
Signaling (Announce Granted)
Signaling (Request Sync)
Signaling (Sync Granted)
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