USB and PCIe
NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 26
Table 6-7. Miscellaneous USB Signal Connections
GPIO00
(USB_VBUS_EN0)
I/O USB0 VBUS Enable: Connect to
enable and overcurrent pins of load
switch (through 100ohm series
resistor to OC pin).
GPIO (VBUS Detect) I 5V to 1.8V level shifter VBUS Detect: Connect to VBUS pin of
USB connector receiving USB0_+/–
interface through level shifter.
Table 6-8. USB 3.2 Signal Connections
USBSS_TX_N/P (USB 3.2 Port #2) DIFF Out Series 0.1uF caps. ESD
Protection near connector if
required.
USB 3.2 Differential
Transmit Data Pairs:
Connect to USB 3.2
connectors, hubs or other
devices on the PCB.
USBSS_RX_N/P (USB 3.2 Port #2)
DIFF In If routed directly to a
peripheral on the board, AC
caps are needed for the
peripheral TX lines. ESD
protection near connector if
required.
USB 3.2 Differential Receive
Data Pairs: Connect to USB
3.2 connectors, hubs or
other devices on the PCB.
6.2 PCIe
Jetson Xavier NX brings two PCIe interfaces to the module pins for up to 5 total lanes (1 x4 + 1
x1) for use on the carrier board. The PCIe x4 interface operates up to Gen4 speed and supports
both Root Port and Endpoint operation. The PCIe x1 interface operates only up to Gen3 speed
and supports only Root Port operation. Figure 6-9 shows both the x1 and x4 interfaces as Root
Ports. Figure 6-10 shows the x4 interfaces as an Endpoint. Lane reversal and polarity inversion
(P/N swapping) is supported.
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