Nvidia JETSON XAVIER NX Design Guide

NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 54
Chapter 9. MIPI CSI Video Input
Jetson Xavier NX brings fourteen MIPI CSI lanes to the connector. Up to three quad-lane
camera streams plus one dual-lane stream or up to six dual-lane camera streams are
supported. Each data lane has a peak bandwidth of up to 2.5 Gbps. The following maximum
configurations are supported:
 3 x4 + 1 x2
 2 x4 + 3 x2
 1 x4 + 5 x2
 6 x2
Table 9-1. CSI Pin Descriptions
Pin #
Module Pin
Name
Xavier Signal Usage/Description
Recommended
Usage
Directio
n
Pin Type
10 CSI0_CLK_N CSI_A_CLK_N
Camera, CSI 0 Clock
2-lane Camera
#1, 4-lane
Camera #1
(lower 2 lanes)
Input
MIPI D-
PHY
12 CSI0_CLK_P CSI_A_CLK_P
4 CSI0_D0_N CSI_A_D0_N
Camera, CSI 0 Data 0
6 CSI0_D0_P CSI_A_D0_P
16 CSI0_D1_N CSI_A_D1_N
Camera, CSI 0 Data 1
18 CSI0_D1_P CSI_A_D1_P
9 CSI1_CLK_N CSI_B_CLK_N
Camera, CSI 1 Clock
2-lane Camera
#2, 4-lane
Camera #1
(upper 2 lanes)
11 CSI1_CLK_P CSI_B_CLK_P
3 CSI1_D0_N CSI_B_D0_N
Camera, CSI 1 Data 0
5 CSI1_D0_P CSI_B_D0_P
15 CSI1_D1_N CSI_B_D1_N
Camera, CSI 1 Data 1
17 CSI1_D1_P CSI_B_D1_P
28 CSI2_CLK_N CSI_C_CLK_N
Camera, CSI 2 Clock
2-lane Camera
#3, 4-lane
Camera #2
(lower 2 lanes)
30 CSI2_CLK_P CSI_C_CLK_P
22 CSI2_D0_N CSI_C_D0_N
Camera, CSI 2 Data 0
24 CSI2_D0_P CSI_C_D0_P
34 CSI2_D1_N CSI_C_D1_N
Camera, CSI 2 Data 1
36 CSI2_D1_P CSI_C_D1_P

Nvidia JETSON XAVIER NX Specifications

General

Storage	16 GB eMMC 5.1
AI Performance	21 TOPS (INT8)
Operating Temperature	-25°C to 80°C
Operating System	Linux (JetPack SDK)
GPU	NVIDIA Volta architecture with 384 CUDA cores and 48 Tensor cores
CPU	6-core NVIDIA Carmel ARMv8.2 64-bit CPU 6 MB L2 + 4 MB L3
Memory	8GB 128-bit LPDDR4x
Video Decode	2x 4K60 | 4x 4K30 | 8x 1080p60 | 16x 1080p30 (H.265/H.264)
Camera	Up to 6 cameras
Connectivity	Gigabit Ethernet, M.2 Key E for Wi-Fi/Bluetooth
Power	10 W / 15 W / 20 W
Dimensions	70mm x 45mm