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NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 79
is in target mode. The FAN_TACH pin [GPIO8] is another input that could be affected by noise on
the signal edges. The
SDMMC_CLK pin, while used to output the clock, also sample the clock at
the input to help with read timing. Therefore, the
SDMMC_CLK pin may benefit from enabling
Schmitt-trigger mode. Care should be taken if the Schmitt-trigger mode setting is changed
from the default initialization mode as this can influence interface timing.
13.3 Pins Pulled or Driven High During
Power-ON
The Jetson Xavier NX is powered up before the carrier board (See Section 5.1 for power
sequencing). Table 13-1 lists the pins on Jetson Xavier NX that default to being pulled or driven
high. Care must be taken on the carrier board design to ensure that any of these pins that
connect to devices on the carrier board (or devices connected to the carrier board) do not
cause damage or excessive leakage to those devices. Some of the ways to avoid issues with
sensitive devices are:
External pull-downs on the carrier board that are strong enough to keep the signals low
are one solution, given that this does not affect the function of the pin.
Buffers or level shifters can be used to separate the signals from devices that may be
affected. The buffer/shifter should be disabled until the device power is enabled.
Table 13-1. Pins Pulled or Driven High by Xavier Prior to SYS_RESET*
Inactive
Jetson Xavier NX Pin Power-ON reset
Default
Pull-up Strength
(kΩ)
Jetson Xavier NX
Pin
Power-ON reset
Default
Pull-up Strength
(kΩ)
SLEEP/WAKE* Internal pull-up ~100 SPI0_CS0* Internal pull-up ~15
FORCE_RECOVERY* Internal pull-up ~100 SPI0_CS1* Internal pull-up ~15
UART1_RXD Internal pull-up ~100 SPI1_CS0* Internal pull-up ~18
SPI1_CS1* Internal pull-up ~18
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