NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 81
Chapter 14. Unused Interface Terminations
14.1 Unused Multi-purpose Standard CMOS
Pad Interfaces
The following Jetson Xavier NX pins (and groups of pins) are Xavier MPIO pins that support
either special function IOs (SFIO) and/or GPIO capabilities. Any unused pins or portions of pin
groups listed in Table 14-1 that are not used can be left unconnected.
Table 14-1. Unused MPIO Pins and Pin Group
Jetson Xavier NX Pins / Pin Groups Jetson Xavier NX Pins / Pin Groups
FORCE_RECOVERY* SDMMC
GPIO00 I2S
PCIE[1:0]_CLK/RST/CLKREQ/WAKE UART
GPIO xx I2C
DP0_HPD, DP1_HPD, HDMI_CEC SPI
CAM Control, Clock
14.2 Unused Dedicated Special Purpose
Pad Interfaces
See the Unused SFIO (Special Function I/O) interface pins section in the design checklist
attached to this design guide.
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