Nvidia JETSON XAVIER NX Design Guide

Display
NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 46
Figure 8-7. HDMI Connection Example
10 kΩ 10 k
Ω
VDD_3V3_HDMI
1. 8kΩ 1. 8kΩ
VDD_5V0_HDMI_CON
10 kΩ
MOD_SLE EP*
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
499Ω,1%
VDD_1V8
R
S
R
S
R
S
R
S
R
S
R
S
R
S
R
S
See
Note 4
T PD4E 02B04 DQO R
VDD_5V_IN
HDMI
Type A
H P_ DE T
+5V
D D C/ CE C_ GND
SDA
SCL
RESE RVED
CEC
CK–
CK_SHIELD
CK+
D0–
D0_ SHIELD
D0+
D1–
D1_ SHIELD
D1+
D2–
D2_ SHIELD
D2+
1
3
5
11
7
9
13
15
17
19
2
10
12
6
8
14
16
18
4
VDD_3V3_SY S VDD_3V3_HDMI
10 kΩ
10 0kΩ
0. 1uF
Load Switch
EN
IN OUT
Lev el Shifter
1.8V 5V
CEC Level
Shifter Circuit
(see note)
Lev el Shifter
3.3V 5V
Load Switch
EN
IN OUT
FET
DG
S
Jetson
SoC – HDMI/DP
HDMI_DPx_TXDP3
HDMI_Dx_TXDN3
HDMI_DPx_TXDP2
HDMI_DPx_TXDN2
HDMI_DPx_TXDP1
HDMI_DPx_TXDN1
HDMI_DPx_TXDP0
HDMI_DPx_TXDN0
DP_AUX_CHx_N
DP_AUX_CHx_P
DP_AUX_CHx_HPD
DP
HDMI
HDMI_CEC
DPx_HPD
DPx_AUX_N
DPx_AUX_P
HDMI_CEC
DPx_TXD3_N
DPx_TXD3_P
DPx_TXD2_N
DPx_TXD2_P
DPx_TXD1_N
DPx_TXD1_P
DPx_TXD0_N
DPx_TXD0_P
88/96
92/100
90/98
94
41/65
39/63
47/71
45/69
53/77
59/83
57/81
51/75
0/1
Notes:
1. Level shifters required on DDC/HPD. Xavier pads are not 5V tolerant and cannot directly meet HDMI VIL/VIH
requirements. HPD level shifter can be non-inverting or inverting. The HPD level shifter in the reference design
is inverting. The reference design uses a BJT level shifter and a resistor divider is needed. See the reference
design if a similar approach will be used.
2. If EMI/ESD devices are necessary, they must be tuned to minimize the impact to signal quality, which must
meet the timing and electrical requirements of the HDMI specification for the modes to be supported. See
requirements and recommendations in the related sections of the “HDMI Interface Signal Routing
Requirements” table (Table 8-5).
3. The DP1_TXx pads are native DP pads and require series AC capacitors (ACCAP) and pull-downs (RPD) to be
HDMI compliant. The 499Ω, 1% pull-downs must be disabled when Jetson Xavier NX is off or in sleep mode to
meet the HDMI VOFF requirement. The enable to the FET, enables the pull-downs when the HDMI interface is
to be used. Chokes between pull-downs and FET are optional improvements for HDMI 2.0 operation.
4. Series resistors RS are required. See the RS section in Table 8-5 for details.
5. See reference design for CEC level shifting/blocking circuit.

Nvidia JETSON XAVIER NX Specifications

General

Storage	16 GB eMMC 5.1
AI Performance	21 TOPS (INT8)
Operating Temperature	-25°C to 80°C
Operating System	Linux (JetPack SDK)
GPU	NVIDIA Volta architecture with 384 CUDA cores and 48 Tensor cores
CPU	6-core NVIDIA Carmel ARMv8.2 64-bit CPU 6 MB L2 + 4 MB L3
Memory	8GB 128-bit LPDDR4x
Video Decode	2x 4K60 | 4x 4K30 | 8x 1080p60 | 16x 1080p30 (H.265/H.264)
Camera	Up to 6 cameras
Connectivity	Gigabit Ethernet, M.2 Key E for Wi-Fi/Bluetooth
Power	10 W / 15 W / 20 W
Dimensions	70mm x 45mm