Nvidia JETSON XAVIER NX Design Guide

USB and PCIe
NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | 34
Module Pin Name
Type
Termination
Description
PCIE0_CLKREQ*
I/O
47kΩ pull-up to
VDD_3V3_SYS
on
module
PCIe Clock Request for PCIE0_CLK: Connect to CLKREQ pins on
device/connector(s). If the module is configured as an Endpoint,
include open-drain buffers between the clock request pin on the
module and the device/connector. One buffer should have the
output to the module and be powered by the 3.3V rail on the
module. The other buffer should have the output pointing at the
connector/device and be powered by the 3.3V rail at the
connector/device. These buffers isolate the on-module pull-up
resistors as well as ensures the pins on both the Root Port and
Endpoint sides will not be driven high before the associated power
is enabled.
PCIE0_RST*
O
4.7kΩ pull-up to
VDD_3V3_SYS
on
module
PCIe Reset: Connect to PERST pins on device/connector(s). If the
module is configured as an Endpoint, include an open-drain buffer
between the reset pin on the module and the device/connector
powered by the 3.3V rail at the connector/device. The buffer should
have the output toward the module. This isolates the on-module
pull-up resistor as well as ensures this signal will not be
pulled/driven high before the module is powered on.
PCIe Interface 1 (x1 – Controller #4)
PCIE1_TX0_N/P
DIFF OUT
Series 0.22uF
Capacitor
Differential Transmit Data Pair: Connect to TX_N/P pins of PCIe
connector or RX_N/P pin of PCIe device through AC cap according
to supported configuration.
PCIE1_RX0_N/P
DIFF IN
Series 0.22uF
capacitors near Jetson
Xavier NX pins or
device if device on
main PCB.
Differential Receive Data Pair: Connect to RX_N/P pins of PCIe
connector or TX_N/P pin of PCIe device through AC cap according
to supported configuration.
PCIE1_CLK_N/P
DIFF OUT
Differential Reference Clock Output: Connect to REFCLK_N/P
pins of PCIe device/connector
PCIE1_CLKREQ*
I/O (Root Port)
I (Endpoint)
47kΩ pull-up to
VDD_3V3_SYS
on
module
PCIe Clock Request for PCIE1_CLK: Connect to CLKREQ pins on
device/connector(s)
PCIE1_RST*
O (Root Port)
I (Endpoint)
4.7kΩ pull-up to
VDD_3V3_SYS
on
module
PCIe Reset: Connect to PERST pins on device/connector(s)
Common
PCIE_WAKE*
I
100kΩ pull-up to
VDD_3V3_SYS
on
module
PCIe Wake: Connect to WAKE pins on device or connector. If the
module is configured as an Endpoint, include an open-drain buffer
between the wake pin on the module and the device/connector
powered by the 3.3V rail at the connector/device. The buffer should
have the output toward the connector/device. This isolates the on-
module pull-up resistors as well as ensures this signal will not be
pulled/driven high before the Root Port is powered on.

Nvidia JETSON XAVIER NX Specifications

General

Storage	16 GB eMMC 5.1
AI Performance	21 TOPS (INT8)
Operating Temperature	-25°C to 80°C
Operating System	Linux (JetPack SDK)
GPU	NVIDIA Volta architecture with 384 CUDA cores and 48 Tensor cores
CPU	6-core NVIDIA Carmel ARMv8.2 64-bit CPU 6 MB L2 + 4 MB L3
Memory	8GB 128-bit LPDDR4x
Video Decode	2x 4K60 | 4x 4K30 | 8x 1080p60 | 16x 1080p30 (H.265/H.264)
Camera	Up to 6 cameras
Connectivity	Gigabit Ethernet, M.2 Key E for Wi-Fi/Bluetooth
Power	10 W / 15 W / 20 W
Dimensions	70mm x 45mm