NVIDIA Jetson Xavier NX DG-09693-001_v1.7 | v
Simplified pin types for PCIe and USB SS differential signals and
updated PCIE_WAKE_N pull-up on module value in Table 6-2 “USB
3.1 and PCIe Pin Description”
• Added note related to load switch to Figure 6-2 “USB SS Type A
Example”
• Reversed order of pins in Module Pin #s column to match [1:0] order
in Module Pin Name column in Table 8-2 “DP and HDMI Pin
Mapping”
• Simplified HDMI/DP Pin Types Table 8-1 “eDP and DP Pin
Descriptions”
1.6 February 25, 2022
•
Updated descriptions for SHUTDOWN_REQ* and POWER_EN in
Power Supply and Sequencing section.
• Update power on sequence to include minimum delay from VDD_IN
valid to POWER_EN active.
• Correct PCIe/USB SS mapping table that has the wrong UPHY lanes
(should be NVHS lanes)
• Correct reference to PEX_CLK3 in Table 6-11 (PCIe Signal
Connections). Should be PEX_CLK5.
• Correct PCIe guidelines where loss should just be dB, not dB/in.
• Update CSI to support all 14 lanes (3x4 +1x2, 2x4 + 3x2, 1x4 + 5x2)
• Updated USB Recovery sections to include minimum requirement for
entering Force Recovery mode.
•
Add USB SS and Wireless Coexistence section
1.7 November 16, 2022
• Chapter 1 Intro: Added notes related to USB 3.2 and updated
document to use USB 3.2 throughout
• Chapter 1 Intro: Added note related to replacing Master/Slave
terminology and updated throughout document
• Section 5.1: Added additional description for SHUTDOWN_REQ*
• Figure 5-5: Added power off initiated by de-asserting POWER_EN
• Section 6.2: Added text related to PCIe polarity inversion support
• Table 6-11: Corrected pull-up value on-module for PCIE_WAKE*
• Figure 8-7: Corrected DP_AUX connections
• Figure 11-1: Corrected I2C pull-up voltage in note 2 under figure.
• Table 13-1: Removed SYS_RESET*
• Table 13-2: Corrected pull-up value on-module for PCIE_WAKE*
Section 18.2/18.3/18.4: Updated text to use mm instead of in/mils
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