57
CJ1-H-R, CJ1-H, CJ1M, and CJ1 CPU Unit Comparison Section 1-7
Data con-
trol
instruc-
tions
PID with autotuning Supported (eliminating the need to adjust PID constants). Not supported.
Subrou-
tine
instruc-
tions
Global subroutines Supported (GSBS, GSBN, and GRET instructions)
Enables easier structuring of subroutines.
Not supported.
Failure
diagnosis
instruc-
tions
Error log storage for
FAL
Supported.
FAL can be executed without placing an entry in the error log. (Only system FAL
errors will be placed in the error log.)
Not supported.
Error simulation with
FAL/FALS
Supported.
Fatal and nonfatal errors can be simulated in the system to aid in debugging.
Not supported.
Data com-
parison
instruc-
tions
AREA RANGE COM-
PARE (ZCP) and DOU-
BLE RANGE
COMPARE (ZCPL)
Supported. Not supported.
Index reg-
ister real I/
O address
conver-
sion for
CVM1/CV
Program and real I/O
memory address com-
patibility with CVM1/CV-
series PLCs
CVM1/CV-series real I/O memory addresses can be converted to CJ-series
addresses and placed in index registers or CJ-series real I/O memory
addresses in index registers can be converted to CVM1/CV-series addresses.
Not supported.
Condition
Flag sav-
ing and
loading
Compatibility with
CVM1/CV-series PLCs
Condition Flag status can be saved or loading using the SAVE CONDITION
FLAGS (CCS) and LOAD CONDITION FLAGS (CCL) instructions, enabling
applications where Condition Flag status must be passed between different pro-
gram locations, tasks, or cycles.
Not supported.
Disabling power interruptions in pro-
gram sections
Supported.
Instructions between DI and EI are executed without performing power OFF pro-
cessing even if a power interruption has been detected and confirmed.
Not supported.
Condition Flag operation The statuses of the Equals, Negative, and Error Flags are maintained for execu-
tion of the following instructions.
TIM, TIMH, TMHH, CNT, IL, ILC, JMP0, JME0, XCHG, XCGL, MOVR, symbol
comparison instructions, CMP, CMPL, CPS, CPSL, TST, TSTN, STC, and CLC.
The Equals,
Negative, and
Error Flags are
turned OFF after
executing the fol-
lowing instruc-
tions.
TIM, TIMH,
TMHH, CNT, IL,
ILC, JMP0,
JME0, XCHG,
XCGL, MOVR,
symbol compari-
son instructions,
CMP, CMPL,
CPS, CPSL,
TST, and TSTN.
Item CJ1-H-R CPU
Unit
CJ1-H CPU Unit CJ1M CPU Unit CJ1 CPU Unit
CJ1H-CPU6@H-R CJ1H-CPU6@H CJ1G-CPU4@H CJ1M-CPU2@/1@ CJ1G-CPU4@
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